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Rapid growth in advanced packaging applications, shrinking geometries, new materials, and higher-performance power devices, is creating unprecedented challenges in failure localization and analysis. Defective or underperforming semiconductor devices often show an anomalous distribution of local power dissipation, leading to localized temperature increases.
Lock-in thermography is one of the most common and increasingly relied-upon methods to localize defects in advanced packages. By powering up the device and utilizing high-sensitivity thermal optics, failure analysis engineers can analyze the thermal signature (or "hot spots") from the package and pinpoint specific areas of interest for further investigation. A key benefit of this technique over others for localization in packaging is that it is non-destructive and preserves the defect for further isolation and analysis.
Memory and advanced logic devices are integrated into different packaging schemes, all of which encounter challenges related to scale, clock speed, heat dissipation, and 3D complexity. Detecting defects in these devices necessitates various techniques, with thermal fault isolation being one of the most common and increasingly relied-upon methods. Through powering up the device and utilizing high-sensitivity thermal optics, failure analysis (FA) engineers can analyze the thermal signature from and pinpoint specific areas of interest for further investigation. In memory applications, the high-aspect ratio, complex packaging architectures especially benefit from the ELITE System's z-dimensional information and depth resolution.
The Thermo Scientific ELITE System can be equipped to handle 10 KV high-voltage capabilities with fully featured user and DUT safety mechanisms. You will benefit from uncompromised thermal sensitivity for fast time to results for power devices, IGBT, power MOSFET, and various high-voltage devices.
For Research Use Only. Not for use in diagnostic procedures.